enable issuer_verilog.py to generate new MMU/DCache config memory type
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 1 May 2021 20:47:27 +0000 (21:47 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 1 May 2021 20:47:27 +0000 (21:47 +0100)
commiteee847759f4e4f8934ba007ad04bb26d614c6f52
tree7e3e948a0bb2e21515dd39d45c806f032e1e85dc
parent7dd83e3a860ca17bfd3f49fe9f6eba7cedee0094
enable issuer_verilog.py to generate new MMU/DCache config memory type
src/soc/simple/issuer_verilog.py