start converting hardfloat-verilog fmac to nmigen
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 10 Aug 2019 07:53:28 +0000 (08:53 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 10 Aug 2019 07:53:28 +0000 (08:53 +0100)
commitf04ea220aff1f0e53ea265d24a8c0e78c0e43453
tree3cfbdbf0e83e5fa2bcd78f76a05d102af60e3288
parent47ceb8804d82cb83a617146789acfa1e5d8e0874
start converting hardfloat-verilog fmac to nmigen
src/ieee754/fpdiv/mulAddRecFN.py