create add0 stage module and use it
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 27 Feb 2019 13:15:01 +0000 (13:15 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 27 Feb 2019 13:15:01 +0000 (13:15 +0000)
commitf5d86bd5e275785b798d477946831b4e47281b7c
tree122e4630daf3c3e03d0d369f614eac9924fc93ef
parentd7b8cc01c5cf96424152812cb95044c017b995af
create add0 stage module and use it
src/add/nmigen_add_experiment.py