add brackets round if & in dcache

diff --git a/src/soc/experiment/dcache.py b/src/soc/experiment/dcache.py
index f137a6d815892cca464e9ccdbdeb7ed392fdfca7..8db58fa43642141087e6a589fe1e37898f677230 100644 (file)
--- a/src/soc/experiment/dcache.py
+++ b/src/soc/experiment/dcache.py
@@ -669,7 +669,7 @@ class DCache(Elaboratable):
 
                 for i in range(NUM_WAYS):
                     with m.If(go & cache_valid_bits[req_index][i] &
 
                 for i in range(NUM_WAYS):
                     with m.If(go & cache_valid_bits[req_index][i] &

-                              read_tag(i, cache_tag_set) == s_tag
+                              (read_tag(i, cache_tag_set) == s_tag)

                               & tlb_valid_way[j]):
                         comb += hit_way_set[j].eq(i)
                         comb += s_hit.eq(1)
                               & tlb_valid_way[j]):
                         comb += hit_way_set[j].eq(i)
                         comb += s_hit.eq(1)