- comb += self.e.read_reg1.eq(dec_a.reg_out)
- comb += self.e.read_reg2.eq(dec_b.reg_out)
- comb += self.e.read_reg3.eq(dec_c.reg_out)
- comb += self.e.write_reg.eq(dec_o.reg_out)
- comb += self.e.write_ea.eq(dec_o2.reg_out)
- comb += self.e.imm_data.eq(dec_b.imm_out) # immediate in RB (usually)
- comb += self.e.zero_a.eq(dec_a.immz_out) # RA==0 detected
+ comb += e.read_reg1.eq(dec_a.reg_out)
+ comb += e.read_reg2.eq(dec_b.reg_out)
+ comb += e.read_reg3.eq(dec_c.reg_out)
+ comb += e.write_reg.eq(dec_o.reg_out)
+ comb += e.write_ea.eq(dec_o2.reg_out)
+ comb += e.imm_data.eq(dec_b.imm_out) # immediate in RB (usually)
+ comb += e.zero_a.eq(dec_a.immz_out) # RA==0 detected