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Fix conversion to MSB0
author
Cesar Strauss
<cestrauss@gmail.com>
Sun, 14 Feb 2021 21:47:02 +0000
(18:47 -0300)
committer
Cesar Strauss
<cestrauss@gmail.com>
Sun, 14 Feb 2021 21:47:02 +0000
(18:47 -0300)
Correct formula is 31 - x.
src/soc/decoder/power_decoder2.py
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diff --git
a/src/soc/decoder/power_decoder2.py
b/src/soc/decoder/power_decoder2.py
index 640acef86e7b8c8c74c95fcbba75125f4d445bec..a1a69c995c88cf2e41f6e56280313e4874025bb6 100644
(file)
--- a/
src/soc/decoder/power_decoder2.py
+++ b/
src/soc/decoder/power_decoder2.py
@@
-1326,7
+1326,7
@@
class SVP64PrefixDecoder(Elaboratable):
rmfields = [6, 8] + list(range(10,32)) # SVP64 24-bit RM
l = []
for idx in rmfields:
- l.append(self.opcode_in[3
2
-idx])
+ l.append(self.opcode_in[3
1
-idx])
with m.If(self.is_svp64_mode):
comb += self.svp64_rm.eq(Cat(*l))