whoops, import error

diff --git a/src/soc/fu/mmu/fsm.py b/src/soc/fu/mmu/fsm.py
index de84038b9d923d6d354a5e4ee7b1a770b609e1dd..eafe81c0f8de65cb91ada9d26f687c13055f9837 100644 (file)
--- a/src/soc/fu/mmu/fsm.py
+++ b/src/soc/fu/mmu/fsm.py
@@ -16,7 +16,7 @@ from openpower.decoder.power_enums import MicrOp
 from soc.experiment.mem_types import LoadStore1ToMMUType
 from soc.experiment.mem_types import MMUToLoadStore1Type
 
-from fu.ldst.loadstore import LoadStore1, TestSRAMLoadStore1
+from soc.fu.ldst.loadstore import LoadStore1, TestSRAMLoadStore1
 
 
 class FSMMMUStage(ControlBase):