DIV overflow needs to be copied into both bits of XER.ov

(OV, OV32)

diff --git a/src/soc/fu/div/output_stage.py b/src/soc/fu/div/output_stage.py
index 9eb16f6c6b367a67bcaf2bb25e80512e7a39aa4d..0af52151872308784b5855db84bb0c7d97310e75 100644 (file)
--- a/src/soc/fu/div/output_stage.py
+++ b/src/soc/fu/div/output_stage.py
@@ -71,7 +71,7 @@ class DivOutputStage(PipeModBase):
                                   | ((abs_quotient == sign_bit_mask)
                                      & ~self.quotient_neg))
             with m.Else():
-                comb += xer_ov.eq(overflow)
+                comb += xer_ov.eq(Repl(overflow, 2)) # set OV _and_ OV32
 
         with m.If(op.is_32bit):
             calc_overflow(self.i.dive_abs_ov32, 0x80000000)