from openpower.decoder.power_enums import MicrOp, Function, CryIn
from nmigen.hdl.rec import Layout
-# needed for SVP64 information at the pipeline
-from openpower.decoder.power_svp64_rm import sv_input_record_layout
class CompALUOpSubset(CompOpSubsetBase):
"""CompALUOpSubset
grab subsets.
"""
def __init__(self, name=None):
- layout = [('insn_type', MicrOp),
+ layout = (('insn_type', MicrOp),
('fn_unit', Function),
('imm_data', Layout((("data", 64), ("ok", 1)))),
('rc', Layout((("rc", 1), ("ok", 1)))), # Data
('is_signed', 1),
('data_len', 4), # actually used by ALU, in OP_EXTS
('insn', 32),
- ] + sv_input_record_layout
+ )
super().__init__(layout, name=name)
from nmigen.hdl.rec import Record, Layout
from nmigen import Signal
+# needed for SVP64 information at the pipeline
+from openpower.decoder.power_svp64_rm import sv_input_record_layout
+
class CompOpSubsetBase(Record):
"""CompOpSubsetBase
assert name.endswith("OpSubset")
name = name[4:-8].lower() + "_op"
+ layout = list(layout) + sv_input_record_layout
Record.__init__(self, Layout(layout), name=name)
# grrr. Record does not have kwargs