use new extpower/intpower and pads.useCoreSize params

diff --git a/experiments9/coriolis2/ioring.py b/experiments9/coriolis2/ioring.py
index c61fa472cceb80c31667186b538b92a0172396eb..42ff14b02b630f6dc813ec19860faf205762cf0e 100644 (file)
--- a/experiments9/coriolis2/ioring.py
+++ b/experiments9/coriolis2/ioring.py
@@ -36,6 +36,9 @@ chip.update({ 'pads.ioPadGauge' : 'pxlib',
           #'chip.size'       : ( l(30200), l(30200) ),
           # no-core option (test_issuer but no actual core)
           'core.size'       : ( l(13000), l(13000) ),
-          'chip.size'       : ( l(17000), l(17000) ),
+          'chip.size'       : ( l(14400), l(14400) ),
+          'pads.useCoreSize': True,
+          'chip.n_extpower'  : 2,
+          'chip.n_intpower'  : 1,
           'chip.clockTree'  : True,
        })