improve debug for test_sim.py

diff --git a/src/soc/simulator/test_sim.py b/src/soc/simulator/test_sim.py
index f6a52fc9491a1ee6a17560f61ce2d6b17dd0c4d3..e6b09667da10fe77f0eaf49c28ab066b0296f00a 100644 (file)
--- a/src/soc/simulator/test_sim.py
+++ b/src/soc/simulator/test_sim.py
@@ -294,7 +294,8 @@ class DecoderBase:
         for reg in regs:
             qemu_val = qemu.get_register(reg)
             sim_val = sim.gpr(reg).value
-            self.assertEqual(qemu_val, sim_val)
+            self.assertEqual(qemu_val, sim_val,
+                             "expect %x got %x" % (qemu_val, sim_val))
 
 
 class DecoderTestCase(DecoderBase, GeneralTestCases):