give spblock512 a name as a submodule

diff --git a/src/soc/bus/SPBlock512W64B8W.py b/src/soc/bus/SPBlock512W64B8W.py
index 02836a40cc32fec62906ebb68b56b944acd3adca..d00aa53267f2fcfaf1153f09e9d870ca646f3129 100644 (file)
--- a/src/soc/bus/SPBlock512W64B8W.py
+++ b/src/soc/bus/SPBlock512W64B8W.py
@@ -44,9 +44,9 @@ class SPBlock512W64B8W(Elaboratable):
 
         # create Chips4Makers 4k SRAM cell here, mark it as "black box"
         # for coriolis2 to pick up
-        sram = Instance("spblock_512w64b8w", i_a=a, o_q=q, i_d=d,
-                                             i_we=we, i_clk=ClockSignal())
-        m.submodules += sram
+        sram = Instance("spblock512w64b8w", i_a=a, o_q=q, i_d=d,
+                                            i_we=we, i_clk=ClockSignal())
+        m.submodules.spb = sram
         # has to be added to the actual module rather than the instance
         # sram.attrs['blackbox'] = 1
 

diff --git a/src/soc/litex/florent b/src/soc/litex/florent
index f1eb3ba9e89bdb1748e6655cbe8342f4e0704cae..7771c7d9180d369299fc754e640733e309d9adf6 160000 (submodule)
--- a/src/soc/litex/florent
+++ b/src/soc/litex/florent
@@ -1 +1 @@
-Subproject commit f1eb3ba9e89bdb1748e6655cbe8342f4e0704cae
+Subproject commit 7771c7d9180d369299fc754e640733e309d9adf6