remove unneeded comment in trap msin stage

diff --git a/src/soc/fu/trap/main_stage.py b/src/soc/fu/trap/main_stage.py
index 45038c2047c9b096cf167b7b361bd9c0935a96ef..325fb373546673df3ec19a15554e775bcc6fe9a9 100644 (file)
--- a/src/soc/fu/trap/main_stage.py
+++ b/src/soc/fu/trap/main_stage.py
@@ -214,8 +214,8 @@ class TrapMainStage(PipeModBase):
 
             # OP_SC
             with m.Case(MicrOp.OP_SC):
-                # TODO: scv must generate illegal instruction.  this is
-                # the decoder's job, not ours, here.
+                # tscb is not covered here. currently an illegal instruction.
+                # raising that the decoder's job, not ours, here.
 
                 # jump to the trap address, return at cia+4
                 self.trap(m, 0xc00, cia_i+4)