reset uarts with sp_reset not uart_reset

diff --git a/src/bsv/peripheral_gen/quart.py b/src/bsv/peripheral_gen/quart.py
index 0d314ddde000c293c87eca3b8ffcf50ff67f2d9f..cc0f3111a9dd57f7eef98569651ff5ce0322db48 100644 (file)
--- a/src/bsv/peripheral_gen/quart.py
+++ b/src/bsv/peripheral_gen/quart.py
@@ -15,7 +15,7 @@ class quart(PBase):
     def mkslow_peripheral(self, size=0):
         return "        Uart16550_AXI4_Lite_Ifc quart{0} <- \n" + \
                "                mkUart16550(clocked_by sp_clock,\n" + \
-               "                    reset_by uart_reset, sp_clock, sp_reset);"
+               "                    reset_by sp_reset, sp_clock, sp_reset);"
 
     def _mk_connection(self, name=None, count=0):
         return "quart{0}.slave_axi_uart"

diff --git a/src/bsv/peripheral_gen/uart.py b/src/bsv/peripheral_gen/uart.py
index c757c83b754ec889053be0e8c5825ef1c8adbefc..1533d7f86c696b63ba804aa7ae153609c56e2c2d 100644 (file)
--- a/src/bsv/peripheral_gen/uart.py
+++ b/src/bsv/peripheral_gen/uart.py
@@ -16,7 +16,7 @@ class uart(PBase):
     def mkslow_peripheral(self, size=0):
         return "        Ifc_Uart_bs uart{0} <- \n" + \
                "                mkUart_bs(clocked_by sp_clock,\n" + \
-               "                    reset_by uart_reset, sp_clock, sp_reset);"
+               "                    reset_by sp_reset, sp_clock, sp_reset);"
 
     def _mk_connection(self, name=None, count=0):
         return "uart{0}.slave_axi_uart"