radeonsi: skip vs output optimizations for some outputs
authorPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tue, 14 Apr 2020 16:04:35 +0000 (18:04 +0200)
committerPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Mon, 20 Apr 2020 06:45:16 +0000 (08:45 +0200)
If PT_SPRITE_TEX is enabled, PS inputs are overriden at runtime so
we can't apply the vs output optim.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2747
Fixes: 3ec9975555d ("radeonsi: eliminate trivial constant VS outputs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4559>

src/amd/llvm/ac_llvm_build.c
src/amd/llvm/ac_llvm_build.h
src/amd/vulkan/radv_nir_to_llvm.c
src/gallium/drivers/radeonsi/si_shader.c

index c2b5667f9964d845a95c07c08cd863165df5ee6e..3d7589ee0930395be27ecf85d5f35668da67be09 100644 (file)
@@ -3081,6 +3081,7 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
                            LLVMValueRef main_fn,
                            uint8_t *vs_output_param_offset,
                            uint32_t num_outputs,
+                           uint32_t skip_output_mask,
                            uint8_t *num_param_exports)
 {
        LLVMBasicBlockRef bb;
@@ -3124,6 +3125,9 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
 
                        target -= V_008DFC_SQ_EXP_PARAM;
 
+                       if ((1u << target) & skip_output_mask)
+                               continue;
+
                        /* Parse the instruction. */
                        memset(&exp, 0, sizeof(exp));
                        exp.offset = target;
index ff90092754e0d2cfb5a91fd9a94851f65efe1648..2c6142e76f9bf49d5f45df1fbe73965a52923e88 100644 (file)
@@ -611,6 +611,7 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ac,
                            LLVMValueRef main_fn,
                            uint8_t *vs_output_param_offset,
                            uint32_t num_outputs,
+                           uint32_t skip_output_mask,
                            uint8_t *num_param_exports);
 void ac_init_exec_full_mask(struct ac_llvm_context *ctx);
 
index 85128ed07981fd2473d85621b3da3f1b2c312103..29a891627f7099ac0e26f0b01b472e2c2c9a9c0b 100644 (file)
@@ -3705,7 +3705,7 @@ ac_nir_eliminate_const_vs_outputs(struct radv_shader_context *ctx)
        ac_optimize_vs_outputs(&ctx->ac,
                               ctx->main_function,
                               outinfo->vs_output_param_offset,
-                              VARYING_SLOT_MAX,
+                              VARYING_SLOT_MAX, 0,
                               &outinfo->param_exports);
 }
 
index e615b81c29394109614458e355d5e3e10d197183..7ae29880adb539c8c46abb8345d33d3dd6e01b5f 100644 (file)
@@ -1276,13 +1276,24 @@ static void si_optimize_vs_outputs(struct si_shader_context *ctx)
 {
    struct si_shader *shader = ctx->shader;
    struct si_shader_info *info = &shader->selector->info;
+   unsigned skip_vs_optim_mask = 0;
 
    if ((ctx->type != PIPE_SHADER_VERTEX && ctx->type != PIPE_SHADER_TESS_EVAL) ||
        shader->key.as_ls || shader->key.as_es)
       return;
 
+   /* Optimizing these outputs is not possible, since they might be overriden
+    * at runtime with S_028644_PT_SPRITE_TEX. */
+   for (int i = 0; i < info->num_outputs; i++) {
+      if (info->output_semantic_name[i] == TGSI_SEMANTIC_PCOORD ||
+          info->output_semantic_name[i] == TGSI_SEMANTIC_TEXCOORD) {
+         skip_vs_optim_mask |= 1u << shader->info.vs_output_param_offset[i];
+      }
+   }
+
    ac_optimize_vs_outputs(&ctx->ac, ctx->main_fn, shader->info.vs_output_param_offset,
-                          info->num_outputs, &shader->info.nr_param_exports);
+                          info->num_outputs, skip_vs_optim_mask,
+                          &shader->info.nr_param_exports);
 }
 
 static bool si_vs_needs_prolog(const struct si_shader_selector *sel,