# == Intermediate wire definitions ==#
 muxwire = '''
-      Wire#(Bit#({1}))   wrcell{0}_mux<-mkDWire(0);'''
+      Wire#(Bit#({1})) wrcell{0}_mux<-mkDWire(0);'''
 generic_io = '''
       GenericIOType cell{0}_mux_out=unpack(0);
       Wire#(Bit#(1)) cell{0}_mux_in<-mkDWire(0);
       Wire#(Bit#(1)) wrtwi{0}_scl_out<-mkDWire(0);
       Wire#(Bit#(1)) wrtwi{0}_scl_outen<-mkDWire(0);
       Wire#(Bit#(1)) wrtwi{0}_scl_in<-mkDWire(0);
-      GenericIOType  twi{0}_sda_io = GenericIOType{{
+      GenericIOType twi{0}_sda_io = GenericIOType{{
                  outputval:wrtwi{0}_sda_out,
                  output_en:wrtwi{0}_sda_outen,
                  input_en:~wrtwi{0}_sda_outen,
                  drivestrength:0,
                  opendrain_en:0
       }};
-      GenericIOType  twi{0}_scl_io = GenericIOType{{
+      GenericIOType twi{0}_scl_io = GenericIOType{{
                  outputval:wrtwi{0}_scl_out,
                  output_en:wrtwi{0}_scl_outen,
                  input_en:~wrtwi{0}_scl_outen,
       Wire#(Bit#(1)) wrsd{0}_d3_out<-mkDWire(0);
       Wire#(Bit#(1)) wrsd{0}_d3_outen<-mkDWire(0);
       Wire#(Bit#(1)) wrsd{0}_d3_in<-mkDWire(0);
-      GenericIOType  sd{0}_clk_io = GenericIOType{{
+      GenericIOType sd{0}_clk_io = GenericIOType{{
                  outputval:wrsd{0}_clk,
                  output_en:1,
                  input_en:0,
                  drivestrength:0,
                  opendrain_en:0
       }};
-      GenericIOType  sd{0}_cmd_io = GenericIOType{{
+      GenericIOType sd{0}_cmd_io = GenericIOType{{
                  outputval:wrsd{0}_cmd,
                  output_en:1,
                  input_en:0,
                  drivestrength:0,
                  opendrain_en:0
       }};
-      GenericIOType  sd{0}_d0_io = GenericIOType{{
+      GenericIOType sd{0}_d0_io = GenericIOType{{
                  outputval:wrsd{0}_d0_out,
                  output_en:wrsd{0}_d0_outen,
                  input_en:~wrsd{0}_d0_outen,
                  drivestrength:0,
                  opendrain_en:0
       }};
-      GenericIOType  sd{0}_d1_io = GenericIOType{{
+      GenericIOType sd{0}_d1_io = GenericIOType{{
                  outputval:wrsd{0}_d1_out,
                  output_en:wrsd{0}_d1_outen,
                  input_en:~wrsd{0}_d1_outen,
                  drivestrength:0,
                  opendrain_en:0
       }};
-      GenericIOType  sd{0}_d2_io = GenericIOType{{
+      GenericIOType sd{0}_d2_io = GenericIOType{{
                  outputval:wrsd{0}_d2_out,
                  output_en:wrsd{0}_d2_outen,
                  input_en:~wrsd{0}_d2_outen,
                  drivestrength:0,
                  opendrain_en:0
       }};
-      GenericIOType  sd{0}_d3_io = GenericIOType{{
+      GenericIOType sd{0}_d3_io = GenericIOType{{
                  outputval:wrsd{0}_d3_out,
                  output_en:wrsd{0}_d3_outen,
                  input_en:~wrsd{0}_d3_outen,