unsigned r600_get_num_tile_pipes(struct radeon *radeon)
{
- return radeon->num_tile_pipes;
+ return radeon->info.r600_num_tile_pipes;
}
unsigned r600_get_backend_map(struct radeon *radeon)
{
- return radeon->backend_map;
+ return radeon->info.r600_backend_map;
}
unsigned r600_get_minor_version(struct radeon *radeon)
}
}
-static int radeon_get_num_tile_pipes(struct radeon *radeon)
-{
- struct drm_radeon_info info = {};
- uint32_t num_tile_pipes = 0;
- int r;
-
- info.request = RADEON_INFO_NUM_TILE_PIPES;
- info.value = (uintptr_t)&num_tile_pipes;
- r = drmCommandWriteRead(radeon->info.fd, DRM_RADEON_INFO, &info,
- sizeof(struct drm_radeon_info));
- if (r)
- return r;
-
- radeon->num_tile_pipes = num_tile_pipes;
- return 0;
-}
-
-static int radeon_get_backend_map(struct radeon *radeon)
-{
- struct drm_radeon_info info = {};
- uint32_t backend_map = 0;
- int r;
-
- info.request = RADEON_INFO_BACKEND_MAP;
- info.value = (uintptr_t)&backend_map;
- r = drmCommandWriteRead(radeon->info.fd, DRM_RADEON_INFO, &info,
- sizeof(struct drm_radeon_info));
- if (r)
- return r;
-
- radeon->backend_map = backend_map;
- radeon->backend_map_valid = TRUE;
-
- return 0;
-}
-
struct radeon *radeon_create(struct radeon_winsys *ws)
{
struct radeon *radeon = CALLOC_STRUCT(radeon);
if (radeon_drm_get_tiling(radeon))
return NULL;
- if (radeon->info.drm_minor >= 11) {
- radeon_get_num_tile_pipes(radeon);
- radeon_get_backend_map(radeon);
- }
-
/* XXX disable ioctl thread offloading until the porting is done. */
setenv("RADEON_THREAD", "0", 0);
#endif
#ifndef RADEON_INFO_NUM_BACKENDS
-#define RADEON_INFO_NUM_BACKENDS 10
+#define RADEON_INFO_NUM_BACKENDS 0xa
+#endif
+
+#ifndef RADEON_INFO_NUM_TILE_PIPES
+#define RADEON_INFO_NUM_TILE_PIPES 0xb
+#endif
+
+#ifndef RADEON_INFO_BACKEND_MAP
+#define RADEON_INFO_BACKEND_MAP 0xd
#endif
/* Enable/disable feature access for one command stream.
radeon_get_drm_value(ws->fd, RADEON_INFO_TILING_CONFIG, NULL,
&ws->info.r600_tiling_config);
+
+ if (ws->info.drm_minor >= 11) {
+ radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
+ &ws->info.r600_num_tile_pipes);
+
+ if (radeon_get_drm_value(ws->fd, RADEON_INFO_BACKEND_MAP, NULL,
+ &ws->info.r600_backend_map))
+ ws->info.r600_backend_map_valid = TRUE;
+ }
}
return TRUE;