/*=====================================*/
/*===== interface declaration =====*/
- interface SP_ios;
-{1}
+ interface SP_dedicated_ios;
`ifdef AXIEXP
interface Get#(Bit#(67)) axiexp1_out;
interface Put#(Bit#(67)) axiexp1_in;
endinterface
interface Ifc_slow_peripherals;
interface AXI4_Slave_IFC#(`ADDR,`DATA,`USERSPACE) axi_slave;
- interface SP_ios slow_ios;
+ interface SP_dedicated_ios slow_ios;
method Action external_int(Bit#(32) in);
`ifdef CLINT
method Bit#(1) msip_int;
`endif
`ifdef PLIC method ActionValue#(Tuple2#(Bool,Bool)) intrpt_note; `endif
interface IOCellSide iocell_side; // mandatory interface
+{1}
endinterface
/*================================*/
end
`ifdef UART0
- SyncBitIfc#(Bit#(1)) uart0_interrupt <-mkSyncBitToCC(uart_clock,uart_reset);
+ SyncBitIfc#(Bit#(1)) uart0_interrupt <-
+ mkSyncBitToCC(sp_clock, uart_reset);
rule synchronize_the_uart0_interrupt;
uart0_interrupt.send(uart0.irq);
endrule
`ifdef QSPI0 method qspi0_isint=qspi0.interrupts[5]; `endif
`ifdef QSPI1 method qspi1_isint=qspi1.interrupts[5]; `endif
`ifdef UART0 method uart0_intr=uart0.irq; `endif
- interface SP_ios slow_ios;
+ interface SP_dedicated_ios slow_ios;
/* template for dedicated peripherals
`ifdef UART0
interface uart0_coe=uart0.coe_rs232;
endinterface
// NEEL EDIT
interface iocell_side=pinmux.iocell_side;
- //interface pad_config0= gpioa.pad_config;
+ interface pad_config0= gpioa.pad_config;
method Action external_int(Bit#(32) in);
wr_interrupt<= in;
endmethod
def __init__(self, name):
self.name = name
+ def slowifdeclmux(self):
+ return ''
+
+ def slowifdecl(self):
+ return ''
+
def axibase(self, name, ifacenum):
name = name.upper()
return "%(name)s%(ifacenum)dBase" % locals()
def mkslow_peripheral(self, size=0):
return " Ifc_Uart_bs uart{0} <- \n" + \
- " mkUart_bs(clocked_by uart_clock,\n" + \
+ " mkUart_bs(clocked_by sp_clock,\n" + \
" reset_by uart_reset, sp_clock, sp_reset);"
def _mk_connection(self, name=None, count=0):
def mkslow_peripheral(self, size=0):
return " Uart16550_AXI4_Lite_Ifc uart{0} <- \n" + \
- " mkUart16550(clocked_by uart_clock,\n" + \
+ " mkUart16550(clocked_by sp_clock,\n" + \
" reset_by uart_reset, sp_clock, sp_reset);"
def _mk_connection(self, name=None, count=0):
" import mux::*;\n" + \
" import gpio::*;\n"
- def slowifdecl(self):
+ def slowifdeclmux(self):
size = len(self.peripheral.pinspecs)
- return " interface GPIO_config#(%d) pad_config{0};" % size
+ return " interface GPIO_config#(%d) pad_config{0};" % size
def num_axi_regs32(self):
return 2
mname = mname.upper()
print "AXIslavenum", name, mname
(ret, x) = PBase.axi_slave_idx(self, idx, name, ifacenum)
- (ret2, x) = PBase.axi_slave_idx(self, idx, mname, ifacenum)
+ (ret2, x) = PBase.axi_slave_idx(self, idx+1, mname, ifacenum)
return ("%s\n%s" % (ret, ret2), 2)
def mkslow_peripheral(self, size=0):
if slow:
self.slow = slow(ifacename)
self.slow.peripheral = self
- for fname in ['slowimport', 'slowifdecl', 'mkslow_peripheral',
+ for fname in ['slowimport', 'slowifdecl', 'slowifdeclmux',
+ 'mkslow_peripheral',
'mk_connection', 'mk_cellconn', 'mk_pincon']:
fn = CallFn(self, fname)
setattr(self, fname, types.MethodType(fn, self))
ret.append(self.data[name].slowimport())
return '\n'.join(list(filter(None, ret)))
+ def slowifdeclmux(self, *args):
+ ret = []
+ for (name, count) in self.ifacecount:
+ for i in range(count):
+ ret.append(self.data[name].slowifdeclmux().format(i, name))
+ return '\n'.join(list(filter(None, ret)))
+
def slowifdecl(self, *args):
ret = []
for (name, count) in self.ifacecount: