Implement 1<<r3 directly by a shift

It generates simpler Yosys graphs.

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index b2711cbb0ccced9ecce3b770511ee1f98fc99b01..9df03bb05b4d5693f707fd72f0e400506703a30d 100644 (file)
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -471,7 +471,7 @@ class TestIssuerInternal(Elaboratable):
                     # set selected mask bit for 1<<r3 mode
                     dst_shift = Signal(range(64))
                     comb += dst_shift.eq(self.int_pred.data_o & 0b111111)
-                    comb += new_dstmask.bit_select(dst_shift, 1).eq(1)
+                    comb += new_dstmask.eq(1 << dst_shift)
                 with m.Else():
                     # invert mask if requested
                     comb += new_dstmask.eq(self.int_pred.data_o ^ inv)
@@ -495,7 +495,7 @@ class TestIssuerInternal(Elaboratable):
                     # set selected mask bit for 1<<r3 mode
                     src_shift = Signal(range(64))
                     comb += src_shift.eq(self.int_pred.data_o & 0b111111)
-                    comb += new_srcmask.bit_select(src_shift, 1).eq(1)
+                    comb += new_srcmask.eq(1 << src_shift)
                 with m.Else():
                     # invert mask if requested
                     comb += new_srcmask.eq(self.int_pred.data_o ^ inv)