AddingPeripherals.mdwn
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 1 Aug 2018 07:40:45 +0000 (08:40 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 1 Aug 2018 07:40:45 +0000 (08:40 +0100)
docs/AddingPeripherals.mdwn
src/bsv/peripheral_gen/sdram.py

index 2c04d2941558d1bf461465d36faeb58d8b4227b6..1f46b464ba7b3e15968584e5781d8acce7d0c2a5 100644 (file)
@@ -285,7 +285,8 @@ is added.
 So first, we must identify the nearest similar class.  FlexBus looks
 like a good candidate, so we take a copy of src/bsv/peripheral\_gen/flexbus.py
 called sdram.py.  The simplest next step is to global/search/replace
-"flexbus" with "sdram".  At this phase, despite knowing that it will
+"flexbus" with "sdram", and for peripheral instance declaration replace
+"fb" with "sdr".  At this phase, despite knowing that it will
 auto-generate the wrong code, we add it as a "supported" peripheral
 at the bottom of src/bsv/peripheral\_gen/base.py, in the "PFactory"
 (Peripheral Factory) class:
index baf355d0dc455de0770d51ccbc9604fa7738716a..b676933eb4c5f4d51ce2f8cb236b8ab8cdbe1327 100644 (file)
@@ -14,7 +14,7 @@ class sdram(PBase):
                                    ".sdram_side")
 
     def fastifdecl(self, name, count):
-        return "//interface FlexBus_Master_IFC fb{0}_out;".format(count)
+        return "//interface FlexBus_Master_IFC sdr{0}_out;".format(count)
 
     def get_clock_reset(self, name, count):
         return "slow_clock, slow_reset"
@@ -22,10 +22,10 @@ class sdram(PBase):
     def mkfast_peripheral(self):
         return "AXI4_Slave_to_FlexBus_Master_Xactor_IFC " + \
                "#(`PADDR, `DATA, `USERSPACE)\n" + \
-               "        fb{0} <- mkAXI4_Slave_to_FlexBus_Master_Xactor;"
+               "        sdr{0} <- mkAXI4_Slave_to_FlexBus_Master_Xactor;"
 
     def _mk_connection(self, name=None, count=0):
-        return "fb{0}.axi_side"
+        return "sdr{0}.axi_side"
 
     def pinname_in(self, pname):
         return {'ta': 'sdram_side.m_tAn',