assert(val.regClass() == s1);
assert(dst.regClass() == bld.lm);
- return bld.sop2(Builder::s_cselect, bld.hint_vcc(Definition(dst)), Operand((uint32_t) -1), Operand(0u), bld.scc(val));
+ return bld.sop2(Builder::s_cselect, Definition(dst), Operand((uint32_t) -1), Operand(0u), bld.scc(val));
}
Temp bool_to_scalar_condition(isel_context *ctx, Temp val, Temp dst = Temp(0, s1))
label_constant_64bit = 1 << 22,
label_uniform_bitwise = 1 << 23,
label_scc_invert = 1 << 24,
+ label_vcc_hint = 1 << 25,
};
static constexpr uint32_t instr_labels = label_vec | label_mul | label_mad | label_omod_success | label_clamp_success |
return label & label_uniform_bool;
}
+ void set_vcc_hint()
+ {
+ add_label(label_vcc_hint);
+ }
+
+ bool is_vcc_hint()
+ {
+ return label & label_vcc_hint;
+ }
};
struct opt_ctx {
instr->operands[1].constantEquals(0x3f800000u) &&
instr->operands[2].isTemp())
ctx.info[instr->definitions[0].tempId()].set_b2f(instr->operands[2].getTemp());
+
+ ctx.info[instr->operands[2].tempId()].set_vcc_hint();
break;
case aco_opcode::v_cmp_lg_u32:
if (instr->format == Format::VOPC && /* don't optimize VOP3 / SDWA / DPP */
return;
}
+ if (ctx.info[instr->definitions[0].tempId()].is_vcc_hint()) {
+ instr->definitions[0].setHint(vcc);
+ }
+
/* TODO: There are still some peephole optimizations that could be done:
* - abs(a - b) -> s_absdiff_i32
* - various patterns for s_bitcmp{0,1}_b32 and s_bitset{0,1}_b32