return 'input'
return None
- def pname(self, name):
+ def iname(self):
""" generates the interface spec e.g. flexbus_ale
if there is only one flexbus interface, or
sd{0}_cmd if there are several. string format
appropriate. single mode stops the numerical extension.
"""
if self.single:
- return '%s_%s' % (self.ifacename, name)
- return '%s{0}_%s' % (self.ifacename, name)
+ return self.ifacename
+ return '%s{0}' % self.ifacename
+
+ def pname(self, name):
+ """ generates the interface spec e.g. flexbus_ale
+ if there is only one flexbus interface, or
+ sd{0}_cmd if there are several. string format
+ function turns this into sd0_cmd, sd1_cmd as
+ appropriate. single mode stops the numerical extension.
+ """
+ return "%s_%s" % (self.iname(), name)
def busfmt(self, *args):
""" this function creates a bus "ganging" system based
f.write(c.format(i))
f.write(self.data[name].ifacefmt(i))
+ def ifacefmt2(self, f, *args):
+ comment = '''
+ interface PeripheralSide{0} {1};'''
+ for (name, count) in self.ifacecount:
+ for i in range(count):
+ iname = self.data[name].iname().format(i)
+ f.write(comment.format(name.upper(), iname))
+
def wirefmt(self, f, *args):
comment = '\n // following wires capture signals ' \
'to IO CELL if %s-{0} is\n' \
# ==============================================================
# == create method definitions for all peripheral interfaces ==#
- ifaces.ifacefmt(bsv_file)
+ ifaces.ifacefmt2(bsv_file)
bsv_file.write("\n endinterface\n")
# ===== finish interface definition and start module definition=======
// the I/O from the IOcell actually goes.
interface IOCellSide iocell_side;
endinterface
+
(*synthesize*)
module mkpinmux(Ifc_pinmux);
''')
bsv_file.write("\n endinterface;")
bsv_file.write('''
+
interface iocell_side = interface IOCellSide
''')
iocells.ifacedef(bsv_file)
bsv_file.write("\n endinterface;")
bsv_file.write('''
- interface peripheral_side = interface PeripheralSide
+
+ interface peripheral_side = interface PeripheralSide
''')
ifaces.ifacedef(bsv_file)
- bsv_file.write("\n endinterface;")
+ bsv_file.write("\n endinterface;")
bsv_file.write(footer)
print("BSV file successfully generated: bsv_src/pinmux.bsv")
// peripheral and an output field will be an input to the peripheral.
// Bi-directional functions also have an output-enable (which
// again comes *in* from the peripheral)
- // interface declaration between UART-0 and pinmux
interface PeripheralSideUART uart;
interface PeripheralSideGPIOA gpioa;
interface PeripheralSideTWI twi;
// the I/O from the IOcell actually goes.
interface IOCellSide iocell_side;
endinterface
- (*synthesize*)
+ (*synthesize*)
module mkpinmux(Ifc_pinmux);
// the followins wires capture the pin-mux selection
endmethod
endinterface;
- interface peripheral_side= interface PeripheralSide
+
+ interface peripheral_side = interface PeripheralSide
interface uart = interface PeripheralSideUART
// interface declaration between UART and pinmux
interface tx = interface Put