add fp32 div pipe test
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 8 Jul 2019 14:50:38 +0000 (15:50 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 8 Jul 2019 14:50:38 +0000 (15:50 +0100)
src/ieee754/fpdiv/pipeline.py
src/ieee754/fpdiv/test/div_data32.py [new file with mode: 0644]
src/ieee754/fpdiv/test/test_fpdiv_pipe_32.py [new file with mode: 0644]

index 01aa462bde1306e85efb8aeeccead739cb951fc7..e632a6d99269759486341b90d28a092da4691d01 100644 (file)
@@ -135,7 +135,7 @@ class FPDIVMuxInOut(ReservationStations):
     """
     def __init__(self, width, num_rows, op_wid=0):
         self.id_wid = num_bits(width)
-        self.pspec = {)
+        self.pspec = {}
         self.pspec['width'] = width
         self.pspec['id_wid'] = self.id_wid
         self.pspec['op_wid'] = op_wid
diff --git a/src/ieee754/fpdiv/test/div_data32.py b/src/ieee754/fpdiv/test/div_data32.py
new file mode 100644 (file)
index 0000000..281f575
--- /dev/null
@@ -0,0 +1,18 @@
+def regressions():
+    yield  0x80000000, 0x00000000
+    yield  0x00000000, 0x80000000
+    yield  0x0002b017, 0xff3807ab
+    yield  0x40000000, 0x3F800000
+    yield  0x3F800000, 0x40000000
+    yield  0x3F800000, 0x40400000
+    yield  0x40400000, 0x41F80000
+    yield  0x41F9EB4D, 0x429A4C70
+    yield  0x7F7FFFFE, 0x70033181
+    yield  0x7F7FFFFE, 0x70000001
+    yield  0x7F7FFCFF, 0x70200201
+    yield  0x70200201, 0x7F7FFCFF
+    yield 0xbf9b1e94, 0xc038ed3a
+    yield 0x34082401, 0xb328cd45
+    yield 0x5e8ef81, 0x114f3db
+    yield 0x5c75da81, 0x2f642a39
+    yield 0x2b017, 0xff3807ab
diff --git a/src/ieee754/fpdiv/test/test_fpdiv_pipe_32.py b/src/ieee754/fpdiv/test/test_fpdiv_pipe_32.py
new file mode 100644 (file)
index 0000000..e07ffc4
--- /dev/null
@@ -0,0 +1,18 @@
+""" test of FPDIVMuxInOut
+"""
+
+from ieee754.fpdiv.pipeline import (FPDIVMuxInOut,)
+from ieee754.fpcommon.test.case_gen import run_pipe_fp
+from ieee754.fpcommon.test import unit_test_single
+from ieee754.fpdiv.test.div_data32 import regressions
+
+from sfpy import Float32
+from operator import truediv as div
+
+def test_pipe_fp32():
+    dut = FPDIVMuxInOut(32, 4)
+    run_pipe_fp(dut, 32, "div", unit_test_single, Float32,
+                   regressions, div, 10)
+
+if __name__ == '__main__':
+    test_pipe_fp32()