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comment latchregister
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sun, 22 Mar 2020 10:12:38 +0000
(10:12 +0000)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sun, 22 Mar 2020 10:12:38 +0000
(10:12 +0000)
src/nmutil/latch.py
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diff --git
a/src/nmutil/latch.py
b/src/nmutil/latch.py
index 6bf6fd9979e0a8555b44983a883d90b07a3b09a6..5f3a0c01edc73fa0bc2559da4378e94df9a62885 100644
(file)
--- a/
src/nmutil/latch.py
+++ b/
src/nmutil/latch.py
@@
-23,7
+23,7
@@
endmodule
def latchregister(m, incoming, outgoing, settrue, name=None):
reg = Signal.like(incoming, name=name) # make reg same as input. reset OK.
- with m.If(settrue):
+ with m.If(settrue):
# pass in some kind of expression/condition here
m.d.sync += reg.eq(incoming) # latch input into register
m.d.comb += outgoing.eq(incoming) # return input (combinatorial)
with m.Else():