The valid/ready protocol doesn't actually forbid p.ready_o
being active while p.valid_i is inactive. It just mean that
the ALU is idle, and is ready to accept new data.
This should help avoiding potential combinatorial loops from
p.ready_o to p.valid_i.
with m.Else():
# sequential ALU handshake:
# ready_o responds to valid_i, but only if the ALU is idle
- m.d.comb += self.p.ready_o.eq(self.p.valid_i & alu_idle)
+ m.d.comb += self.p.ready_o.eq(alu_idle)
# select the internally generated valid_o, above
m.d.comb += self.n.valid_o.eq(alu_done)