Add default case to decoder

diff --git a/src/decoder/power_decoder.py b/src/decoder/power_decoder.py
index 275c85a77c7bb1ed693f717091afa8ee73984928..22e52435d42b4f8ac923321e274b4e0c631499ac 100644 (file)
--- a/src/decoder/power_decoder.py
+++ b/src/decoder/power_decoder.py
@@ -43,6 +43,19 @@ class PowerDecoder(Elaboratable):
                     for bit in single_bit_flags:
                         sig = getattr(self, get_signal_name(bit))
                         comb += sig.eq(int(row[bit]))
+            with m.Default():
+                comb += self.function_unit.eq(Function.NONE)
+                comb += self.internal_op.eq(InternalOp.OP_ILLEGAL)
+                comb += self.in1_sel.eq(0)
+                comb += self.in2_sel.eq(0)
+                comb += self.in3_sel.eq(0)
+                comb += self.out_sel.eq(0)
+                comb += self.ldst_len.eq(0)
+                comb += self.rc_sel.eq(0)
+                comb += self.cry_in.eq(0)
+                for bit in single_bit_flags:
+                    sig = getattr(self, get_signal_name(bit))
+                    comb += sig.eq(0)
         return m
 
     def ports(self):

diff --git a/src/decoder/power_enums.py b/src/decoder/power_enums.py
index 6241f752c69a331fb0b650eb40bcb993b71be116..38ef0325328886a05b80a7a433e73e598a7e02a6 100644 (file)
--- a/src/decoder/power_enums.py
+++ b/src/decoder/power_enums.py
@@ -29,8 +29,9 @@ def get_signal_name(name):
 
 @unique
 class Function(Enum):
-    ALU = 0
-    LDST = 1
+    NONE = 0
+    ALU = 1
+    LDST = 2
 
 
 @unique