missing Signal import

diff --git a/src/nmutil/concurrentunit.py b/src/nmutil/concurrentunit.py
index 7e896466ed1a6addfdfe453d1f58a887b8632677..30fe93cf46e9f4d3f5ba5c54fc4ed9e45b450b68 100644 (file)
--- a/src/nmutil/concurrentunit.py
+++ b/src/nmutil/concurrentunit.py
@@ -9,7 +9,7 @@
 """
 
 from math import log
-from nmigen import Module, Elaboratable
+from nmigen import Module, Elaboratable, Signal
 from nmigen.cli import main, verilog
 
 from nmutil.singlepipe import PassThroughStage