radeonsi/gfx10: disable DCC image stores
authorMarek Olšák <marek.olsak@amd.com>
Tue, 23 Jul 2019 21:46:38 +0000 (17:46 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 31 Jul 2019 02:06:23 +0000 (22:06 -0400)
Uncompressed image stores are usually faster.

Also, the driver didn't set WRITE_COMPRESS_ENABLE, so I don't know
what the hw did for image stores.

src/gallium/drivers/radeonsi/si_descriptors.c
src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c

index 6d95cd7e891ae7beeb7296e784dccaa85b3d4e64..09442be1350b619b3464adc4e7dcb998d881f9ca 100644 (file)
@@ -739,7 +739,7 @@ static void si_set_shader_image_desc(struct si_context *ctx,
                assert(fmask_desc || tex->surface.fmask_size == 0);
 
                if (uses_dcc && !skip_decompress &&
-                   ((ctx->chip_class <= GFX9 && view->access & PIPE_IMAGE_ACCESS_WRITE) ||
+                   (view->access & PIPE_IMAGE_ACCESS_WRITE ||
                     !vi_dcc_formats_compatible(screen, res->b.b.format, view->format))) {
                        /* If DCC can't be disabled, at least decompress it.
                         * The decompression is relatively cheap if the surface
index 2707d5fc89191885fbd895086cde14feac8f68ca..6181332ec019e08e26f65ed92da08b06596d9c07 100644 (file)
@@ -196,8 +196,7 @@ LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
        else
                rsrc = ac_build_load_to_sgpr(&ctx->ac, list, index);
 
-       if (ctx->ac.chip_class <= GFX9 &&
-           desc_type == AC_DESC_IMAGE && uses_store)
+       if (desc_type == AC_DESC_IMAGE && uses_store)
                rsrc = force_dcc_off(ctx, rsrc);
        return rsrc;
 }