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add combined instruction and register decoder
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sun, 8 Mar 2020 17:33:38 +0000
(17:33 +0000)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sun, 8 Mar 2020 17:33:38 +0000
(17:33 +0000)
src/decoder/power_enums.py
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diff --git
a/src/decoder/power_enums.py
b/src/decoder/power_enums.py
index 4800bdf210e7f4eee596d3d5e3f1b49e7fb9ea88..dcf5cad263a8978e4cc6d0a42fba4cec2d640cde 100644
(file)
--- a/
src/decoder/power_enums.py
+++ b/
src/decoder/power_enums.py
@@
-29,6
+29,8
@@
default_values = {'unit': "NONE", 'internal op': "OP_ILLEGAL",
'rc' : 'NONE', 'cry in' : 'ZERO', 'form': 'NONE'}
def get_signal_name(name):
+ if name[0].isdigit():
+ name = "is_" + name
return name.lower().replace(' ', '_')