add MMU bugtracker link

diff --git a/src/soc/fu/mmu/fsm.py b/src/soc/fu/mmu/fsm.py
index a519cca76a8a8dc6a0d75a9424974bd743b7408c..f7541b8c48fbf7066fe07b3a43c618d21530f9de 100644 (file)
--- a/src/soc/fu/mmu/fsm.py
+++ b/src/soc/fu/mmu/fsm.py
@@ -2,6 +2,7 @@
 Based on microwatt mmu.vhdl
 
 * https://bugs.libre-soc.org/show_bug.cgi?id=491
+* https://bugs.libre-soc.org/show_bug.cgi?id=450
 """
 
 from nmigen import Elaboratable, Module, Signal, Shape, unsigned, Cat, Mux