nir: move brw_nir_rewrite_image_intrinsic into common code

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
index 0c3d6e823c64a9cee9afaafdc67b379963153d2a..880970a28e57dae97c450d1fc91b8db373c90c60 100644 (file)
--- a/src/compiler/nir/nir.c
+++ b/src/compiler/nir/nir.c
@@ -1989,3 +1989,43 @@ nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot)
    }
    return attribs;
 }
+
+void
+nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin, nir_ssa_def *src)
+{
+   switch (intrin->intrinsic) {
+#define CASE(op) \
+   case nir_intrinsic_image_deref_##op: \
+      intrin->intrinsic = nir_intrinsic_image_##op; \
+      break;
+   CASE(load)
+   CASE(store)
+   CASE(atomic_add)
+   CASE(atomic_min)
+   CASE(atomic_max)
+   CASE(atomic_and)
+   CASE(atomic_or)
+   CASE(atomic_xor)
+   CASE(atomic_exchange)
+   CASE(atomic_comp_swap)
+   CASE(atomic_fadd)
+   CASE(size)
+   CASE(samples)
+   CASE(load_raw_intel)
+   CASE(store_raw_intel)
+#undef CASE
+   default:
+      unreachable("Unhanded image intrinsic");
+   }
+
+   nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
+   nir_variable *var = nir_deref_instr_get_variable(deref);
+
+   nir_intrinsic_set_image_dim(intrin, glsl_get_sampler_dim(deref->type));
+   nir_intrinsic_set_image_array(intrin, glsl_sampler_type_is_array(deref->type));
+   nir_intrinsic_set_access(intrin, var->data.image.access);
+   nir_intrinsic_set_format(intrin, var->data.image.format);
+
+   nir_instr_rewrite_src(&intrin->instr, &intrin->src[0],
+                         nir_src_for_ssa(src));
+}

diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 09950bf339834eb7fb1c1b0b65f267c8cc4f4963..fb36b04ae66da628b2b9a644f399751af5982239 100644 (file)
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -1407,6 +1407,10 @@ nir_intrinsic_align(const nir_intrinsic_instr *intrin)
    return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
 }
 
+/* Converts a image_deref_* intrinsic into a image_* one */
+void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
+                                 nir_ssa_def *handle);
+
 /**
  * \group texture information
  *

diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c
index d4c4dbf3ff0b7c67ee9e21674daea476abebe4d0..e9f897dbc51a24d2f10ecdb06e9ed9ef401d02fe 100644 (file)
--- a/src/gallium/drivers/iris/iris_program.c
+++ b/src/gallium/drivers/iris/iris_program.c
@@ -146,7 +146,7 @@ iris_lower_storage_image_derefs(nir_shader *nir)
             nir_ssa_def *index =
                nir_iadd(&b, nir_imm_int(&b, var->data.driver_location),
                             get_aoa_deref_offset(&b, deref, 1));
-            brw_nir_rewrite_image_intrinsic(intrin, index);
+            nir_rewrite_image_intrinsic(intrin, index);
             break;
          }
 

diff --git a/src/intel/compiler/brw_nir_lower_image_load_store.c b/src/intel/compiler/brw_nir_lower_image_load_store.c
index 2abebceb2d1a37bf2a487a7a081c274f1b4be617..48b98bc57bdaa32f18ae280625fc2bc35c5dbfd5 100644 (file)
--- a/src/intel/compiler/brw_nir_lower_image_load_store.c
+++ b/src/intel/compiler/brw_nir_lower_image_load_store.c
@@ -801,44 +801,3 @@ brw_nir_lower_image_load_store(nir_shader *shader,
 
    return progress;
 }
-
-void
-brw_nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin,
-                                nir_ssa_def *index)
-{
-   nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
-   nir_variable *var = nir_deref_instr_get_variable(deref);
-
-   switch (intrin->intrinsic) {
-#define CASE(op) \
-   case nir_intrinsic_image_deref_##op: \
-      intrin->intrinsic = nir_intrinsic_image_##op; \
-      break;
-   CASE(load)
-   CASE(store)
-   CASE(atomic_add)
-   CASE(atomic_min)
-   CASE(atomic_max)
-   CASE(atomic_and)
-   CASE(atomic_or)
-   CASE(atomic_xor)
-   CASE(atomic_exchange)
-   CASE(atomic_comp_swap)
-   CASE(atomic_fadd)
-   CASE(size)
-   CASE(samples)
-   CASE(load_raw_intel)
-   CASE(store_raw_intel)
-#undef CASE
-   default:
-      unreachable("Unhanded image intrinsic");
-   }
-
-   nir_intrinsic_set_image_dim(intrin, glsl_get_sampler_dim(deref->type));
-   nir_intrinsic_set_image_array(intrin, glsl_sampler_type_is_array(deref->type));
-   nir_intrinsic_set_access(intrin, var->data.image.access);
-   nir_intrinsic_set_format(intrin, var->data.image.format);
-
-   nir_instr_rewrite_src(&intrin->instr, &intrin->src[0],
-                         nir_src_for_ssa(index));
-}

diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 96e2e617d7d99918745b585ce5d4ed2a6dc0cecd..1048da59c9e30770a1bbe3d3134655344f246aff 100644 (file)
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -292,7 +292,7 @@ lower_image_intrinsic(nir_intrinsic_instr *intrin,
    } else {
       unsigned binding_offset = state->set[set].surface_offsets[binding];
       index = nir_iadd(b, index, nir_imm_int(b, binding_offset));
-      brw_nir_rewrite_image_intrinsic(intrin, index);
+      nir_rewrite_image_intrinsic(intrin, index);
    }
 }
 

diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
index 7e13b2ffe1984748923bc0f94f80460e2d88f016..d1d5a5837d07d3b99b30f093da63c90a06862b92 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
+++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
@@ -347,7 +347,7 @@ brw_nir_lower_gl_images(nir_shader *shader,
             b.cursor = nir_before_instr(&intrin->instr);
             nir_ssa_def *index = nir_iadd(&b, nir_imm_int(&b, image_var_idx),
                                           get_aoa_deref_offset(&b, deref, 1));
-            brw_nir_rewrite_image_intrinsic(intrin, index);
+            nir_rewrite_image_intrinsic(intrin, index);
             break;
          }