rename log2_tb -> tb_width

diff --git a/src/ieee754/div_rem_sqrt_rsqrt/core.py b/src/ieee754/div_rem_sqrt_rsqrt/core.py
index 5c75d5fe63b329d28f1dadf7bc1b72e0be744f2c..a1a8edefc343b21e1c48db9bedd13e3f8c126137 100644 (file)
--- a/src/ieee754/div_rem_sqrt_rsqrt/core.py
+++ b/src/ieee754/div_rem_sqrt_rsqrt/core.py
@@ -302,20 +302,20 @@ class DivPipeCoreCalculateStage(Elaboratable):
         pass_flags = []
         for trial_bits in range(radix):
             tb = trial_bits << current_shift
-            log2_tb = log2_radix + current_shift
-            shifted_trial_bits = Const(tb, log2_tb)
-            shifted_trial_bits2 = Const(tb*2, log2_tb+1)
-            shifted_trial_bits_sqrd = Const(tb * tb, log2_tb * 2)
+            tb_width = log2_radix + current_shift
+            shifted_trial_bits = Const(tb, tb_width)
+            shifted_trial_bits2 = Const(tb*2, tb_width+1)
+            shifted_trial_bits_sqrd = Const(tb * tb, tb_width * 2)
 
             # UDivRem
             div_rhs = self.i.compare_rhs
-            if tb != 0: # no point adding stuff that's multiplied by zero
+            if tb != 0:  # no point adding stuff that's multiplied by zero
                 div_factor1 = self.i.divisor_radicand * shifted_trial_bits2
                 div_rhs += div_factor1 << self.core_config.fract_width
 
             # SqrtRem
             sqrt_rhs = self.i.compare_rhs
-            if tb != 0: # no point adding stuff that's multiplied by zero
+            if tb != 0:  # no point adding stuff that's multiplied by zero
                 sqrt_factor1 = self.i.quotient_root * shifted_trial_bits2
                 sqrt_rhs += sqrt_factor1 << self.core_config.fract_width
                 sqrt_factor2 = shifted_trial_bits_sqrd
@@ -323,7 +323,7 @@ class DivPipeCoreCalculateStage(Elaboratable):
 
             # RSqrtRem
             rsqrt_rhs = self.i.compare_rhs
-            if tb != 0: # no point adding stuff that's multiplied by zero
+            if tb != 0:  # no point adding stuff that's multiplied by zero
                 rsqrt_rhs += self.i.root_times_radicand * shifted_trial_bits2
                 rsqrt_rhs += self.i.divisor_radicand * shifted_trial_bits_sqrd