syntax error correction
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 15 Sep 2020 07:48:57 +0000 (08:48 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 15 Sep 2020 07:48:57 +0000 (08:48 +0100)
src/soc/experiment/icache.py

index 221c7b8a29fedb43f19519e9750dcf846dd1ab7d..a1bf7bd0ef140af055649b50599ef16c26729479 100644 (file)
@@ -1266,7 +1266,7 @@ class ICache(Elaboratable):
 #                        is_last_row(r.store_row, r.end_row_ix) then
                         # Check for completion
                         with m.If(stbs_done &
-                                  (is_last_row(r.store_row, r.end_row_ix)):
+                                  is_last_row(r.store_row, r.end_row_ix)):
 #                          -- Complete wishbone cycle
 #                          r.wb.cyc <= '0';
                             # Complete wishbone cycle
@@ -1276,8 +1276,9 @@ class ICache(Elaboratable):
 #                          cache_valids(r.store_index)(replace_way) <=
 #                            r.store_valid and not inval_in;
                             # Cache line is now valid
-                            sync += cache_valid_bits[r.store_index]
-                                [relace_way].eq(r.store_valid & ~inval_in)
+                            cv = cache_valid_bits[r.store_index]
+                            sync += cv[relace_way].eq(
+                                        r.store_valid & ~inval_in)
 
 #                          -- We are done
 #                          r.state <= IDLE;