In progress
authorMichael Nolan <mtnolan2640@gmail.com>
Mon, 17 Feb 2020 14:41:27 +0000 (09:41 -0500)
committerMichael Nolan <mtnolan2640@gmail.com>
Mon, 17 Feb 2020 14:41:27 +0000 (09:41 -0500)
src/ieee754/part_shift/formal/proof_shift_scalar.py
src/ieee754/part_shift/part_shift_scalar.py

index c1821ddcc77eeef450778bc38d6fc26ba1b868fd..59e66358f8ea99279f9023582779948160bcc7a6 100644 (file)
@@ -60,24 +60,31 @@ class ShifterDriver(Elaboratable):
                  out.eq(dut.output)]
 
         expected = Signal(width)
-        comb += expected.eq(data << shifter)
 
         with m.Switch(points.as_sig()):
-            with m.Case(0b00):
-                comb += Assert(out[0:24] == (data[0:24] << shifter) & 0xffffff)
+            # with m.Case(0b00):
+            #     comb += Assert(
+            #         out[0:24] == (data[0:24] << (shifter & 0x1f)) & 0xffffff)
 
             with m.Case(0b01):
-                comb += Assert(out[0:8] == expected[0:8])
-                comb += Assert(out[8:24] == (data[8:24] << shifter) & 0xffff)
-
-            with m.Case(0b10):
-                comb += Assert(out[16:24] == (data[16:24] << shifter) & 0xff)
-                comb += Assert(out[0:16] == (data[0:16] << shifter) & 0xffff)
-
-            with m.Case(0b11):
-                comb += Assert(out[0:8] == expected[0:8])
-                comb += Assert(out[8:16] == (data[8:16] << shifter) & 0xff)
-                comb += Assert(out[16:24] == (data[16:24] << shifter) & 0xff)
+                comb += Assert(out[0:8] ==
+                               (data[0:8] << (shifter & 0x7)) & 0xFF)
+                comb += Assert(out[8:24] ==
+                               (data[8:24] << (shifter & 0xF)) & 0xffff)
+
+            # with m.Case(0b10):
+            #     comb += Assert(out[16:24] ==
+            #                    (data[16:24] << (shifter & 0x7)) & 0xff)
+            #     comb += Assert(out[0:16] ==
+            #                    (data[0:16] << (shifter & 0xf)) & 0xffff)
+
+            # with m.Case(0b11):
+            #     comb += Assert(out[0:8] ==
+            #                    (data[0:8] << (shifter & 0x7)) & 0xFF)
+            #     comb += Assert(out[8:16] ==
+            #                    (data[8:16] << (shifter & 0x7)) & 0xff)
+            #     comb += Assert(out[16:24] ==
+            #                    (data[16:24] << (shifter & 0x7)) & 0xff)
         return m
 
 class PartitionedScalarShiftTestCase(FHDLTestCase):
index d6e6c830d7d80f39af5e4ace90a30c24cff7c0e8..2fe37f81f8b3d25b3cf61da47b6036ed66e9c980 100644 (file)
@@ -65,7 +65,9 @@ class PartitionedScalarShift(Elaboratable):
         for i in range(len(keys)):
             end = keys[i]
             sp = Signal(width)
-            comb += sp[start:].eq(self.data[start:end] << self.shifter)
+            _shifter = Signal(shiftbits, name="shifter%d" % i)
+            comb += _shifter.eq(self.shifter & shifter_masks[i])
+            comb += sp[start:].eq(self.data[start:end] << _shifter)
             shiftparts.append(sp)
 
             start = end  # for next time round loop