add CR and add field-selectable versions of CR0-7

diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py
index d07e54cad87f4b36e4c081fa4ffc392f8af68cee..90f1d76449de745b3b15aac5e1831f14290e6e0f 100644 (file)
--- a/src/soc/decoder/isa/caller.py
+++ b/src/soc/decoder/isa/caller.py
@@ -1,6 +1,7 @@
 from functools import wraps
 from soc.decoder.orderedset import OrderedSet
-from soc.decoder.selectable_int import SelectableInt, selectconcat
+from soc.decoder.selectable_int import (FieldSelectableInt, SelectableInt,
+                                        selectconcat)
 from collections import namedtuple
 import math
 
@@ -145,13 +146,25 @@ class ISACaller:
         # 3.2.2 p45 XER  (actually SPR #0)
         # 3.2.3 p46 p232 VRSAVE (actually SPR #256)
 
+        # create CR then allow portions of it to be "selectable" (below)
+        self.cr = SelectableInt(0, 32)
+
         self.namespace = {'GPR': self.gpr,
                           'MEM': self.mem,
                           'memassign': self.memassign,
                           'NIA': self.pc.NIA,
                           'CIA': self.pc.CIA,
+                          'CR': self.cr,
                           }
 
+        # field-selectable versions of Condition Register TODO check bitranges?
+        self.crl = []
+        for i in range(8):
+            bits = tuple(range(i*4, (i+1)*4))# errr... maybe?
+            _cr = FieldSelectableInt(self.cr, bits)
+            self.crl.append(_cr)
+            self.namespace["CR%d" % i] = _cr
+
         self.decoder = decoder2
 
     def memassign(self, ea, sz, val):