whoops shift has to be done at same bitwidth

diff --git a/src/soc/decoder/isa/radixmmu.py b/src/soc/decoder/isa/radixmmu.py
index fa03fa125b2d927fa30f03af1fa489b211322175..a376e3dce3af89a4ac1471a70006715d4d3208ce 100644 (file)
--- a/src/soc/decoder/isa/radixmmu.py
+++ b/src/soc/decoder/isa/radixmmu.py
@@ -392,7 +392,8 @@ class RADIX:
         if mbits < 5 or mbits > 16:
             print("badtree")
             return "badtree"
-        shift = shift - mbits
+        # reduce shift (has to be done at same bitwidth)
+        shift = shift - selectconcat(SelectableInt(0, 1), mbits)
         mask_size = mbits[1:5] # get 4 LSBs
         pgbase = selectconcat(data[8:56], SelectableInt(0, 8)) # shift up 8
         return shift, mask_size, pgbase