DMI-to-JTAG needed to be "sync" to get ack/resp right

diff --git a/src/soc/litex/florent/idcode_test2.svf b/src/soc/litex/florent/idcode_test2.svf
index c1498cf89673f2a5ff827f1dbbad6af87049bc7c..e83d885193b57411f2ac492b5260cf7b0e9b9f9a 100644 (file)
--- a/src/soc/litex/florent/idcode_test2.svf
+++ b/src/soc/litex/florent/idcode_test2.svf
@@ -15,5 +15,14 @@ SDR 8 TDI (2) SMASK (ff) ;
 // set to DMI "data read"
 SIR 4 TDI (9) SMASK (f) ;
 // read 64 bit
+SDR 64 TDI (0000000000000000) SMASK (0000000000000000) TDO (00000000deadbeef) MASK (0000000000000000) ;
+
+// set to DMI "address"
+SIR 4 TDI (8) SMASK (f) ;
+// set DMI "CR" address (8)
+SDR 8 TDI (8) SMASK (ff) ;
+// set to DMI "data read"
+SIR 4 TDI (9) SMASK (f) ;
+// read 64 bit
 SDR 64 TDI (0000000000000000) SMASK (0000000000000000) TDO (00000000deadbeef) MASK (ffffffffffffffff) ;
 

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index 4582e4ec3327bf95a4fdabbbea3b1e571f5f3869..73f69b5f232eb31234a038c99212040f4ac22ab1 100644 (file)
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -119,7 +119,7 @@ class TestIssuer(Elaboratable):
             m.submodules.jtag = jtag = self.jtag
             # TODO: UART2GDB mux, here, from external pin
             # see https://bugs.libre-soc.org/show_bug.cgi?id=499
-            comb += dbg.dmi.connect_to(jtag.dmi)
+            sync += dbg.dmi.connect_to(jtag.dmi)
 
         cur_state = self.cur_state