yield from ALUHelpers.set_int_rb(alu, dec2, inp)
yield from ALUHelpers.set_xer_so(alu, dec2, inp)
- return pia.InstructionInput(ra=inp["ra"], rb=inp["rb"], rc=0)
+
+ overflow = None
+ if 'xer_so' in inp:
+ so = inp['xer_so']
+ overflow = pia.OverflowFlags(so=bool(so),
+ ov=False,
+ ov32=False)
+ return pia.InstructionInput(ra=inp["ra"], rb=inp["rb"], overflow=overflow)
class DivTestHelper(unittest.TestCase):
so = 1 if spr['XER'][XER_bits['SO']] else 0
ov = 1 if spr['XER'][XER_bits['OV']] else 0
ov32 = 1 if spr['XER'][XER_bits['OV32']] else 0
- xer_zero = not (so or ov or ov32)
print("before: so/ov/32", so, ov, ov32)
- else:
- xer_zero = True
# ask the decoder to decode this binary data (endian'd)
# little / big?
yield alu.p.valid_i.eq(0)
opname = code.split(' ')[0]
- if xer_zero:
- fnname = opname.replace(".", "_")
- print(f"{fnname}({pia_inputs})")
- pia_res = getattr(
- pia, opname.replace(".", "_"))(pia_inputs)
- print(f"-> {pia_res}")
- else:
- pia_res = None
+ fnname = opname.replace(".", "_")
+ print(f"{fnname}({pia_inputs})")
+ pia_res = getattr(
+ pia, opname.replace(".", "_"))(pia_inputs)
+ print(f"-> {pia_res}")
yield from isa_sim.call(opname)
index = isa_sim.pc.CIA.value//4