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add in some comments
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Mon, 25 Jun 2018 15:20:30 +0000
(16:20 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Mon, 25 Jun 2018 15:20:30 +0000
(16:20 +0100)
src/bsv/pinmux_generator.py
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diff --git
a/src/bsv/pinmux_generator.py
b/src/bsv/pinmux_generator.py
index ddbb3fda8182fe63b9f2a387833d2dfc9f7bba71..fcf47f05fe6627c389410d3d8c47f5e26dbfb3a7 100644
(file)
--- a/
src/bsv/pinmux_generator.py
+++ b/
src/bsv/pinmux_generator.py
@@
-164,7
+164,9
@@
def write_pmp(pmp, p, ifaces, iocells):
// (giving six pairs of dangling wires, named left and right)
// these iocells are routed in their place on one side ("left")
// and the matching *GPIO* peripheral interfaces in/out/dir
- // connect to the OTHER side ("right").
+ // connect to the OTHER side ("right"). the result is that
+ // the muxer settings end up controlling the routing of where
+ // the I/O from the IOcell actually goes.
interface IOCellSide iocell_side;
endinterface
(*synthesize*)