submodule update
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 28 Sep 2020 11:35:18 +0000 (11:35 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 28 Sep 2020 11:35:18 +0000 (11:35 +0000)
experiments9/cells_orig.lst [new file with mode: 0644]
pinmux

diff --git a/experiments9/cells_orig.lst b/experiments9/cells_orig.lst
new file mode 100644 (file)
index 0000000..de39d12
--- /dev/null
@@ -0,0 +1,258 @@
+ls180
+test_issuer
+adr_l
+adrok_l
+alu0
+alu_alu0
+alu_branch0
+alu_cr0
+alu_div0
+alui_l_102
+alui_l_117
+alui_l_15
+alui_l_28
+alui_l_41
+alui_l_56
+alui_l_68
+alui_l_85
+alui_l
+alu_l_103
+alu_l_118
+alu_l_121
+alu_l_16
+alu_l_29
+alu_l_42
+alu_l_57
+alu_l_69
+alu_l_86
+alu_logical0
+alu_l
+alu_mul0
+alu_shift_rot0
+alu_spr0
+alu_trap0
+bpermd
+branch0
+busy_l
+clz
+core
+cr0
+cr
+cyc_l
+dbg
+dec19
+dec30
+dec31
+dec58
+dec62
+dec_a
+dec_b
+dec_cr_in
+dec_cr_out
+dec_c
+dec_o2
+dec_oe
+dec_o
+dec_rc
+dec_sub0
+dec_sub10
+dec_sub11
+dec_sub15
+dec_sub16
+dec_sub18
+dec_sub19
+dec_sub20
+dec_sub21
+dec_sub22
+dec_sub23
+dec_sub24
+dec_sub26
+dec_sub27
+dec_sub28
+dec_sub4
+dec_sub8
+dec_sub9
+dec
+div0
+div_state_init
+div_state_next
+fast
+fus
+idx_l
+imem
+input_109
+input_48
+input_74
+input_91
+input
+int
+l0_123
+l0
+ld_active
+ldst0
+lenexp
+lod_l
+logical0
+lsd_l
+lsmem
+main_110
+main_22
+main_35
+main_49
+main_9
+main
+mul0
+mul1
+mul2
+mul3
+mul_pipe1
+mul_pipe2
+mul_pipe3
+opc_l_113
+opc_l_119
+opc_l_11
+opc_l_24
+opc_l_37
+opc_l_52
+opc_l_64
+opc_l_81
+opc_l_98
+opc_l
+output_111
+output_50
+output_79
+output_96
+output_stage
+output
+pdecode2
+pick
+pimem
+pipe_106
+pipe_19
+pipe_32
+pipe_45
+pipe_60
+pipe_6
+pipe_end
+pipe_middle_0
+pipe_start
+pipe
+popcount
+rdpick_cr_cr_a
+rdpick_cr_cr_b
+rdpick_cr_cr_c
+rdpick_cr_full_cr
+rdpick_fast_fast1
+rdpick_int_ra
+rdpick_int_rbc
+rdpick_spr_spr1
+rdpick_xer_xer_ca
+rdpick_xer_xer_ov
+rdpick_xer_xer_so
+reg_0_125
+reg_0_133
+reg_0_136
+reg_0_141
+reg_0
+reg_10
+reg_1_126
+reg_1_134
+reg_1_137
+reg_1_142
+reg_11
+reg_12
+reg_13
+reg_14
+reg_15
+reg_16
+reg_17
+reg_18
+reg_19
+reg_1
+reg_20
+reg_2_127
+reg_2_135
+reg_2_138
+reg_21
+reg_22
+reg_23
+reg_24
+reg_25
+reg_26
+reg_27
+reg_28
+reg_29
+reg_2
+reg_30
+reg_3_128
+reg_3_139
+reg_31
+reg_3
+reg_4_129
+reg_4_140
+reg_4
+reg_5_130
+reg_5
+reg_6_131
+reg_6
+reg_7_132
+reg_7
+reg_8
+reg_9
+req_l_114
+req_l_12
+req_l_25
+req_l_38
+req_l_53
+req_l_65
+req_l_82
+req_l_99
+req_l
+reset_l
+rok_l_101
+rok_l_116
+rok_l_14
+rok_l_27
+rok_l_40
+rok_l_55
+rok_l_67
+rok_l_84
+rok_l
+rotator
+rotl
+rst_l_122
+setup_stage
+shiftrot0
+spr0
+spr_main
+sprmap_1
+sprmap
+src_l_10
+src_l_112
+src_l_120
+src_l_23
+src_l_36
+src_l_51
+src_l_63
+src_l_80
+src_l_97
+src_l
+st_active
+state
+st_done
+sto_l
+trap0
+upd_l
+valid_l
+wri_l
+wrpick_cr_cr_a
+wrpick_cr_full_cr
+wrpick_fast_fast1
+wrpick_int_o
+wrpick_spr_spr1
+wrpick_state_msr
+wrpick_state_nia
+wrpick_xer_xer_ca
+wrpick_xer_xer_ov
+wrpick_xer_xer_so
+xer
diff --git a/pinmux b/pinmux
index 99e08dab7b0306525b8b3fb0783c623df8d9f8c5..afade1166f62acfdec5a8b8175a7bece62464a27 160000 (submodule)
--- a/pinmux
+++ b/pinmux
@@ -1 +1 @@
-Subproject commit 99e08dab7b0306525b8b3fb0783c623df8d9f8c5
+Subproject commit afade1166f62acfdec5a8b8175a7bece62464a27