'ldst_mode': 'upd',
}
+
class PowerDecodeSubset(Elaboratable):
"""PowerDecodeSubset: dynamic subset decoder
def get_col_subset(self, opkls):
subset = super().get_col_subset(opkls)
subset.add("in1_sel")
+ subset.add("asmcode")
subset.add("in2_sel")
subset.add("in3_sel")
subset.add("out_sel")
comb += e_out.read_fast2.data.eq(FastRegs.SRR1) # constant: SRR1
comb += e_out.read_fast2.ok.eq(1)
+ # annoying simulator bug
+ if hasattr(e_out, "asmcode") and hasattr(self.dec.op, "asmcode"):
+ comb += e_out.asmcode.eq(self.dec.op.asmcode)
+
return m
def trap(self, m, traptype, trapaddr):
yield instruction.eq(ins) # raw binary instr.
yield Settle()
fn_unit = yield pdecode2.e.do.fn_unit
+ asmcode = yield pdecode2.e.asmcode
+ dec_asmcode = yield pdecode2.dec.op.asmcode
+ print ("asmcode", asmcode, dec_asmcode)
self.assertEqual(fn_unit, Function.ALU.value)
yield from set_alu_inputs(alu, pdecode2, sim)
fn_name = "ALU"
opkls = ALUPipeSpec.opsubsetkls
- m.submodules.pdecode2 = pdecode2 = PowerDecode2(None, opkls, fn_name)
+ pdecode = create_pdecode()
+ m.submodules.pdecode2 = pdecode2 = PowerDecode2(pdecode, opkls, fn_name)
pdecode = pdecode2.dec
pspec = ALUPipeSpec(id_wid=2)