redo start address of firmware so it can be specified -DBOOT_INIT_BASE

diff --git a/README.txt b/README.txt
index 0bd83afd629e7d3cc9de6269916385c55034e38f..bedf8c5b25a4e7aa538775617fc14884142f2f44 100644 (file)
--- a/README.txt
+++ b/README.txt
@@ -1,3 +1,8 @@
 python3 src/ls2.py versa_ecp5 ./hello_world/hello_world.bin
 openocd -f top-openocd.cfg \
         -c "transport select jtag; init; svf -quiet top.svf; exit"
+
+# Versa ECP5 ecpprog QSPI
+
+ecpprog -o 0 binary.bin
+

diff --git a/coldboot/Makefile b/coldboot/Makefile
index 01ec008b169ae6525ef6b32d78ab1dd78b361758..b1bd8de91ec311817e43069053447122b796f20e 100644 (file)
--- a/coldboot/Makefile
+++ b/coldboot/Makefile
@@ -12,6 +12,11 @@ SHORT_TIMER_MULT = 100
 #LONG_TIMER_MULT = 1
 #SHORT_TIMER_MULT = 1
 
+# SPI boot address 0x1000_0000, main SRAM boot would be 0x0000_0000
+# but remember to recompile external_core_top.v with a matching
+# --pc_reset=0xNNNNNNNN
+BOOT_INIT_BASE ?= 0x10000000
+
 LIBGRAMDIR = ../libgram
 LIBGRAMINC = ../libgram/include
 
@@ -29,6 +34,7 @@ CFLAGS = -Os -g -Wall -std=c99 -msoft-float -mno-string \
             -fdata-sections -ffunction-sections -I../include \
             -I $(LIBGRAMINC) \
             -DLONG_TIMER_MULT=$(LONG_TIMER_MULT) \
+            -DBOOT_INIT_BASE=$(BOOT_INIT_BASE) \
             -DSHORT_TIMER_MULT=$(SHORT_TIMER_MULT)
 ASFLAGS = $(CFLAGS)
 LDFLAGS = -T powerpc.lds
@@ -47,8 +53,11 @@ dfii.o: ../libgram/src/dfii.c
 calibration.o: ../libgram/src/calibration.c
        $(CC) $(CPPFLAGS) $(CFLAGS) -c $< -o $@
 
-coldboot.elf: coldboot.o head.o ../lib/console.o $(GRAMOBJS)
-       $(LD) $(LDFLAGS) -o $@ $^
+powerpc.lds: powerpc.lds.S
+       $(CC) $(CFLAGS) -P -E powerpc.lds.S -o powerpc.lds
+
+coldboot.elf: coldboot.o head.o ../lib/console.o $(GRAMOBJS) powerpc.lds
+       $(LD) $(LDFLAGS) -o $@ coldboot.o head.o ../lib/console.o $(GRAMOBJS)
 
 coldboot.bin: coldboot.elf
        $(OBJCOPY) -O binary $^ $@
@@ -59,7 +68,7 @@ coldboot.hex: coldboot.bin
 
 
 clean:
-       @rm -f *.o coldboot.elf coldboot.bin coldboot.hex coldboot.as
+       @rm -f *.o coldboot.elf coldboot.bin coldboot.hex coldboot.as powerpc.lds
 distclean: clean
        rm -f *~
 

diff --git a/coldboot/coldboot.c b/coldboot/coldboot.c
index dcf6277926f4bf7139eedae1a0c6f6d1486f0d71..90a569881afbe2d66b845638a4861085c886f97d 100644 (file)
--- a/coldboot/coldboot.c
+++ b/coldboot/coldboot.c
@@ -67,23 +67,40 @@ int main(void) {
        //puts("Firmware launched...\n");
 
        puts("fw..");
-#if 1
 #if 1
     // print out configuration parameters for QSPI
        volatile uint32_t *qspi_cfg = (uint32_t*)0xc0003000;
-    for (int k=0; k < 2; k++) {
+    for (int k=0; k < 10; k++) {
         tmp = readl((unsigned long)&(qspi_cfg[k]));
-        //puts("cfg");
-        //uart_writeuint32(k);
-        //puts(" ");
-        //uart_writeuint32(tmp);
-        //puts("\n");
+        puts("cfg");
+        uart_writeuint32(k);
+        puts(" ");
+        uart_writeuint32(tmp);
+        puts("\n");
     }
-#endif
+
        volatile uint32_t *qspi = (uint32_t*)0x10000000;
+       volatile uint8_t *qspi_bytes = (uint8_t*)0x10000000;
     // let's not, eh? writel(0xDEAF0123, (unsigned long)&(qspi[0]));
     // tmp = readl((unsigned long)&(qspi[0]));
-#if 1
+for (i=0;i<1000;i++) {
+    writel(0xDEAF0123+i, (unsigned long)&(qspi[i]));
+}
+for (i=0;i<1000;i++) {
+  if (i%8 == 0) puts("\r\n");
+  tmp = readl((unsigned long)&(qspi[i]));
+  uart_writeuint32(tmp);
+  puts(" ");
+}
+putchar(10);
+putchar(10);
+for (i=0;i<1000;i++) {
+  if (i%8 == 0) puts("\r\n");
+  tmp = readb((unsigned long)&(qspi_bytes[i]));
+  uart_writeuint32(tmp);
+  puts(" ");
+}
+#if 0
     while (1) {
         // quick read
         tmp = readl((unsigned long)&(qspi[0x1000/4]));

diff --git a/coldboot/powerpc.lds b/coldboot/powerpc.lds
deleted file mode 100644 (file)
index 00aba33..0000000
--- a/coldboot/powerpc.lds
+++ /dev/null
@@ -1,27 +0,0 @@
-SECTIONS
-{
-       . = 0;
-       _start = .;
-       .head : {
-               KEEP(*(.head))
-       }
-       . = ALIGN(0x1000);
-       .text : { *(.text) *(.text.*) *(.rodata) *(.rodata.*) }
-       . = ALIGN(0x10);
-       .data : { *(.data) *(.data.*) *(.got) *(.toc) }
-       . = ALIGN(0x10);
-       __bss_start = .;
-       .bss : {
-               *(.dynsbss)
-               *(.sbss)
-               *(.scommon)
-               *(.dynbss)
-               *(.bss)
-               *(.common)
-               *(.bss.*)
-       }
-       . = ALIGN(0x10);
-       __bss_end = .;
-       . = . + 0x5000;
-       __stack_top = .;
-}

diff --git a/coldboot/powerpc.lds.S b/coldboot/powerpc.lds.S
new file mode 100644 (file)
index 0000000..b673295
--- /dev/null
+++ b/coldboot/powerpc.lds.S
@@ -0,0 +1,27 @@
+SECTIONS
+{
+       . = BOOT_INIT_BASE;
+       _start = .;
+       .head : {
+               KEEP(*(.head))
+       }
+       . = ALIGN(0x1000);
+       .text : { *(.text) *(.text.*) *(.rodata) *(.rodata.*) }
+       . = ALIGN(0x10);
+       .data : { *(.data) *(.data.*) *(.got) *(.toc) }
+       . = ALIGN(0x10);
+       __bss_start = .;
+       .bss : {
+               *(.dynsbss)
+               *(.sbss)
+               *(.scommon)
+               *(.dynbss)
+               *(.bss)
+               *(.common)
+               *(.bss.*)
+       }
+       . = ALIGN(0x10);
+       __bss_end = .;
+       . = . + 0x5000;
+       __stack_top = .;
+}

diff --git a/src/ls2.py b/src/ls2.py
index 1956a8182d2c87bdcdcfccf0879bebcaf66d35e9..2284a04e438fe20e8010bdab13f08be4a1f9d1ad 100644 (file)
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -686,8 +686,7 @@ def build_platform(fpga, firmware):
             Resource("spi_0", 0,
                      Subsignal("dq",   Pins("W2 V2 Y2 W1", dir="io")),
                      Subsignal("cs_n", Pins("R2", dir="o")),
-                     Attrs(PULLMODE="NONE", DRIVE="8", SLEWRATE="FAST",
-                           IO_TYPE="LVCMOS33"))
+                     Attrs(PULLMODE="NONE", DRIVE="4", IO_TYPE="LVCMOS33"))
         ]
         platform.add_resources(spi_0_ios)
         spi_0_pins = platform.request("spi_0", 0, dir={"dq":"io", "cs_n":"o"},