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pad name starts with p_
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 9 Apr 2021 15:55:29 +0000 (15:55 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 9 Apr 2021 15:55:29 +0000 (15:55 +0000)
experiments10_verilog/doDesign.py patch | blob | history

diff --git a/experiments10_verilog/doDesign.py b/experiments10_verilog/doDesign.py
index b60d198f47062e281963247f18c453993f80da73..e036f39b8770ae370090f37fa5efaf64ad46f907 100644 (file)
--- a/experiments10_verilog/doDesign.py
+++ b/experiments10_verilog/doDesign.py
@@ -55,7 +55,7 @@ def scriptMain ( **kw ):
          , (IoPin.NORTH, None, 'p_b1'       , 'b(1)'   , 'b(1)'     )
          , (IoPin.NORTH, None, 'ground_1'   , 'vss'    )
          , (IoPin.NORTH, None, 'p_b0'       , 'b(0)'   , 'b(0)'     )
-         , (IoPin.NORTH, None, 'sys_rst'    , 'sys_rst'    , 'sys_rst'      )
+         , (IoPin.NORTH, None, 'p_sys_rst'  , 'sys_rst'    , 'sys_rst'      )
          , (IoPin.WEST , None, 'p_f3'       , 'f(3)'   , 'f(3)'     )
          , (IoPin.WEST , None, 'p_f2'       , 'f(2)'   , 'f(2)'     )
          , (IoPin.WEST , None, 'power_1'    , 'vdd'    )