replace part_sig_add with simpler design
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 19 Feb 2020 21:48:45 +0000 (21:48 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 19 Feb 2020 21:48:45 +0000 (21:48 +0000)
Makefile
nets.txt

index 53ee710258d839962f97cb1f929630084327373b..2a56df56c25508f7b95e291113432650cec43deb 100755 (executable)
--- a/Makefile
+++ b/Makefile
  include ./mk/design-flow.mk
 
 
-blif:      part_sig_add.blif
-vst:       part_sig_add.vst
-layout:    part_sig_add_cts_r.ap
-gds:       part_sig_add_cts_r.gds
-
-lvx:       lvx-part_sig_add_cts_r
-druc:      druc-part_sig_add_cts_r
-view:      cgt-part_sig_add_cts_r
+blif:      alu_hier.blif
+vst:       alu_hier.vst
+layout:    alu_hier_cts_r.ap
+gds:       alu_hier_cts_r.gds
+
+lvx:       lvx-alu_hier_cts_r
+druc:      druc-alu_hier_cts_r
+view:      cgt-alu_hier_cts_r
index 27d0cdbff1a1db5f3d76a8d8bdf976f9e31adc96..39f7e48e2290b4fcaea785190bbae74542db72aa 100644 (file)
--- a/nets.txt
+++ b/nets.txt
@@ -1 +1,3 @@
-part_sig_add mux0 mux1 mux2 gtc reorder gt1 mux0$2 mux1$3 mux2$4 gtc$1 reorder$5 eq1 mux0$7 mux1$8 mux2$9 gtc$6 reorder$10 ge1 mux0$12 mux1$13 mux2$14 gtc$11 reorder$15 gt2 mux0$17 mux1$18 mux2$19 gtc$16 reorder$20 eq2 mux0$22 mux1$23 mux2$24 gtc$21 reorder$25 ge2 ripple add1 ripple$26 add2 ripple$27 add3 ls1 pmux1
+alu_hier
+add
+sub