radv: emit PA_SC_LINE_CNTL as part of the rasterization state
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 8 Jul 2020 14:51:54 +0000 (16:51 +0200)
committerMarge Bot <eric+marge@anholt.net>
Fri, 24 Jul 2020 12:30:02 +0000 (12:30 +0000)
While we are at it, remove one useless field in radv_multisample_state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

src/amd/vulkan/radv_pipeline.c
src/amd/vulkan/radv_private.h

index dccf9223cc9ee87dfb3c741262aa9f3fd2546dba..760e990f82d0942ef303a487b3ded5c100151777 100644 (file)
@@ -1110,7 +1110,6 @@ radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline,
                        radv_pipeline_out_of_order_rast(pipeline, blend, pCreateInfo);
        }
 
-       ms->pa_sc_line_cntl = S_028BDC_DX10_DIAMOND_TEST_ENA(1);
        ms->pa_sc_aa_config = 0;
        ms->db_eqaa = S_028804_HIGH_QUALITY_INTERSECTIONS(1) |
                      S_028804_INCOHERENT_EQAA_READS(1) |
@@ -3749,6 +3748,9 @@ radv_pipeline_generate_raster_state(struct radeon_cmdbuf *ctx_cs,
                S_028814_POLY_OFFSET_BACK_ENABLE(vkraster->depthBiasEnable ? 1 : 0) |
                S_028814_POLY_OFFSET_PARA_ENABLE(vkraster->depthBiasEnable ? 1 : 0);
 
+       radeon_set_context_reg(ctx_cs, R_028BDC_PA_SC_LINE_CNTL,
+                              S_028BDC_DX10_DIAMOND_TEST_ENA(1));
+
        /* Conservative rasterization. */
        if (mode != VK_CONSERVATIVE_RASTERIZATION_MODE_DISABLED_EXT) {
                struct radv_multisample_state *ms = &pipeline->graphics.ms;
@@ -3797,7 +3799,6 @@ radv_pipeline_generate_multisample_state(struct radeon_cmdbuf *ctx_cs,
        radeon_set_context_reg(ctx_cs, R_028804_DB_EQAA, ms->db_eqaa);
        radeon_set_context_reg(ctx_cs, R_028A48_PA_SC_MODE_CNTL_0, ms->pa_sc_mode_cntl_0);
        radeon_set_context_reg(ctx_cs, R_028A4C_PA_SC_MODE_CNTL_1, ms->pa_sc_mode_cntl_1);
-       radeon_set_context_reg(ctx_cs, R_028BDC_PA_SC_LINE_CNTL, ms->pa_sc_line_cntl);
        radeon_set_context_reg(ctx_cs, R_028BE0_PA_SC_AA_CONFIG, ms->pa_sc_aa_config);
 
        /* The exclusion bits can be set to improve rasterization efficiency
index 91808b636657a24b508c374b33022f8427ffc1f4..f5c3d46eb24891854419410234537e4f2f210ffa 100644 (file)
@@ -1621,7 +1621,6 @@ unsigned radv_format_meta_fs_key(VkFormat format);
 
 struct radv_multisample_state {
        uint32_t db_eqaa;
-       uint32_t pa_sc_line_cntl;
        uint32_t pa_sc_mode_cntl_0;
        uint32_t pa_sc_mode_cntl_1;
        uint32_t pa_sc_aa_config;