Fix rel_o/go_i signal names

diff --git a/src/soc/fu/compunits/formal/test_compunit.py b/src/soc/fu/compunits/formal/test_compunit.py
index 350a611ca9e6fb0cdeda4c1f3603dfc552793a48..133508b704ed89e508a3194ec33ceac9cf5f84f9 100644 (file)
--- a/src/soc/fu/compunits/formal/test_compunit.py
+++ b/src/soc/fu/compunits/formal/test_compunit.py
@@ -28,12 +28,12 @@ class MaskGenTestCase(FHDLTestCase):
             yield
             while True:
                 yield
-                rd_rel = yield dut.rd.rel
+                rd_rel = yield dut.rd.rel_o
                 if rd_rel != 0:
                     break
-            yield dut.rd.go.eq(0xfff)
+            yield dut.rd.go_i.eq(0xfff)
             yield
-            yield dut.rd.go.eq(0)
+            yield dut.rd.go_i.eq(0)
             for i in range(10):
                 yield