Actually implement rlwimi

diff --git a/src/soc/alu/main_stage.py b/src/soc/alu/main_stage.py
index 59c896a56cc6217b969f506d6dee7661bacc548d..9d8133f1638158f752659c6bfa6261e9d07f171b 100644 (file)
--- a/src/soc/alu/main_stage.py
+++ b/src/soc/alu/main_stage.py
@@ -141,7 +141,7 @@ class ALUMainStage(PipeModBase):
                 comb += maskgen.mb.eq(mb+32)
                 comb += maskgen.me.eq(me+32)
                 comb += mask.eq(maskgen.o)
-                comb += self.o.o.eq(rotl_out & mask)
+                comb += self.o.o.eq((rotl_out & mask) | (self.i.b & ~mask))
                 
 
         ###### sticky overflow and context, both pass-through #####