store indicator in r_busy when data is valid

diff --git a/src/add/singlepipe.py b/src/add/singlepipe.py
index 23589ef3fce0224d7badc9897d0c3d171305209a..06ef732b2c7874d7b72fb38d0ba3a5471e450f7c 100644 (file)
--- a/src/add/singlepipe.py
+++ b/src/add/singlepipe.py
@@ -683,6 +683,7 @@ class BufferedPipeline2(ControlBase):
 
         self.m = ControlBase._elaborate(self, platform)
 
+        r_busy = Signal()
         result = self.stage.ospec()
         if hasattr(self.stage, "setup"):
             self.stage.setup(self.m, self.p.i_data)
@@ -701,15 +702,18 @@ class BufferedPipeline2(ControlBase):
 
         # previous valid and ready
         with self.m.If(p_i_valid_p_o_ready):
-            self.m.d.sync += [self.n.o_valid.eq(1),      # output valid
+            self.m.d.sync += [r_busy.eq(1),      # output valid
+                              #self.n.o_valid.eq(1),      # output valid
                                   eq(self.n.o_data, result), # update output
                                  ]
         # previous invalid or not ready, however next is accepting
         with self.m.Elif(n_i_ready):
             self.m.d.sync += [ eq(self.n.o_data, result)]
             # TODO: could still send data here (if there was any)
-            self.m.d.sync += self.n.o_valid.eq(0) # ...so set output invalid
+            #self.m.d.sync += self.n.o_valid.eq(0) # ...so set output invalid
+            self.m.d.sync += r_busy.eq(0) # ...so set output invalid
 
+        self.m.d.comb += self.n.o_valid.eq(r_busy)
         # if next is ready, so is previous
         self.m.d.comb += self.p._o_ready.eq(n_i_ready)
 

diff --git a/src/add/test_buf_pipe.py b/src/add/test_buf_pipe.py
index df63978c37c592435292121578697459e9cf2c58..7933df3467b0184e2c08c745818be93d8772d6e9 100644 (file)
--- a/src/add/test_buf_pipe.py
+++ b/src/add/test_buf_pipe.py
@@ -639,7 +639,7 @@ def data_chain1():
         for i in range(num_tests):
             data.append(1<<((i*3)%15))
             #data.append(randint(0, 1<<16-2))
-            print (hex(data[-1]))
+            #print (hex(data[-1]))
         return data
 
 
@@ -654,14 +654,14 @@ def test12_resultfn(o_data, expected, i, o):
 # Test 13
 ######################################################################
 
-class ExampleUnBufDelayedPipe(BufferedPipeline2):
+class ExampleUnBufDelayedPipe(BufferedPipeline):
 
     def __init__(self):
-        stage = ExampleStageDelayCls(valid_trigger=1)
-        BufferedPipeline2.__init__(self, stage, stage_ctl=True)
+        stage = ExampleStageDelayCls(valid_trigger=3)
+        BufferedPipeline.__init__(self, stage, stage_ctl=True)
 
     def elaborate(self, platform):
-        m = BufferedPipeline2.elaborate(self, platform)
+        m = BufferedPipeline.elaborate(self, platform)
         m.submodules.stage = self.stage
         return m
 
@@ -762,7 +762,7 @@ class ExampleBufUnBufPipe(ControlBase):
 # Unit Tests
 ######################################################################
 
-num_tests = 10
+num_tests = 100
 
 if __name__ == '__main__':
     print ("test 1")