add trunc_div and trunch_rem to decoder helpers

https://bugs.libre-soc.org/show_bug.cgi?id=324

diff --git a/src/soc/decoder/helpers.py b/src/soc/decoder/helpers.py
index e8fd6cb7e1a5c7ca2c535a6213e2a791684577ee..ef6610e5c89d7d0e0316c216bf51faf8486f46df 100644 (file)
--- a/src/soc/decoder/helpers.py
+++ b/src/soc/decoder/helpers.py
@@ -1,11 +1,38 @@
 import unittest
 from soc.decoder.selectable_int import SelectableInt
 
+"""
+Links:
+* https://bugs.libre-soc.org/show_bug.cgi?id=324 - add trunc_div and trunc_rem
+"""
 
 def exts(value, bits):
     sign = 1 << (bits - 1)
     return (value & (sign - 1)) - (value & sign)
 
+def trunc_div(n, d):
+    f = getattr(n, "trunc_div", None)
+    if f is not None:
+        return f(d)
+    fr = getattr(d, "rtrunc_div", None)
+    if fr is not None:
+        return fr(n)
+    abs_n = abs(n)
+    abs_d = abs(d)
+    abs_q = n // d
+    if (n < 0) == (d < 0):
+        return abs_q
+    return -abs_q
+
+def trunc_rem(n, d):
+    f = getattr(n, "trunc_rem", None)
+    if f is not None:
+        return f(d)
+    fr = getattr(d, "rtrunc_rem", None)
+    if fr is not None:
+        return fr(n)
+    return n - d * trunc_div(n, d)
+
 
 def EXTS(value):
     """ extends sign bit out from current MSB to all 256 bits

diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py
index 79e8b13ec5522791e75bd1184f228005a29c6520..7bf411fd7cd541e6c96e16137b4bd1674fac422a 100644 (file)
--- a/src/soc/decoder/isa/caller.py
+++ b/src/soc/decoder/isa/caller.py
@@ -10,7 +10,7 @@ from soc.decoder.orderedset import OrderedSet
 from soc.decoder.selectable_int import (FieldSelectableInt, SelectableInt,
                                         selectconcat)
 from soc.decoder.power_enums import spr_dict, XER_bits, insns, InternalOp
-from soc.decoder.helpers import exts
+from soc.decoder.helpers import exts, trunc_div, trunc_rem
 from collections import namedtuple
 import math
 import sys

diff --git a/src/soc/decoder/power_pseudo.py b/src/soc/decoder/power_pseudo.py
index e2b6440a6065c28aa4d1c896db211fddac0d8419..2e7b242286f1c4c1567dc8236cadfb7edb13408e 100644 (file)
--- a/src/soc/decoder/power_pseudo.py
+++ b/src/soc/decoder/power_pseudo.py
@@ -255,12 +255,15 @@ def test():
         print("args", args)
         print("-->", " ".join(map(str, args)))
 
-    from soc.decoder.helpers import (EXTS64, EXTZ64, ROTL64, ROTL32, MASK,)
+    from soc.decoder.helpers import (EXTS64, EXTZ64, ROTL64, ROTL32, MASK,
+                                     trunc_div, trunc_rem)
 
     d = {}
     d["print"] = print_
     d["EXTS64"] = EXTS64
     d["EXTZ64"] = EXTZ64
+    d["trunc_div"] = trunc_div
+    d["trunc_rem"] = trunc_rem
     d["SelectableInt"] = SelectableInt
     d["concat"] = selectconcat
     d["GPR"] = gsc.gpr

diff --git a/src/soc/decoder/pseudo/pywriter.py b/src/soc/decoder/pseudo/pywriter.py
index 9acec8cea994809343daa8b74d8ce081c9335520..bac8c4592b8709ffea6928dc19f4d8d33cb29e65 100644 (file)
--- a/src/soc/decoder/pseudo/pywriter.py
+++ b/src/soc/decoder/pseudo/pywriter.py
@@ -20,7 +20,8 @@ header = """\
 
 from soc.decoder.isa.caller import inject, instruction_info
 from soc.decoder.helpers import (EXTS, EXTS64, EXTZ64, ROTL64, ROTL32, MASK,
-                                 ne, eq, gt, ge, lt, le, length)
+                                 ne, eq, gt, ge, lt, le, length,
+                                 trunc_div, trunc_rem)
 from soc.decoder.selectable_int import SelectableInt
 from soc.decoder.selectable_int import selectconcat as concat
 from soc.decoder.orderedset import OrderedSet