add cross-reference to bugtracker and wiki

diff --git a/src/soc/fu/logical/formal/proof_main_stage.py b/src/soc/fu/logical/formal/proof_main_stage.py
index 996099f9eddb7527d34b0725269d7906ecfd8f30..b8f3f396130028e9502581c91ce79e638e43eca5 100644 (file)
--- a/src/soc/fu/logical/formal/proof_main_stage.py
+++ b/src/soc/fu/logical/formal/proof_main_stage.py
@@ -1,5 +1,10 @@
 # Proof of correctness for partitioned equal signal combiner
 # Copyright (C) 2020 Michael Nolan <mtnolan2640@gmail.com>
+"""
+Links:
+ * https://bugs.libre-soc.org/show_bug.cgi?id=331
+ * https://libre-soc.org/openpower/isa/fixedlogical/
+"""
 
 from nmigen import (Module, Signal, Elaboratable, Mux, Cat, Repl,
                     signed)